The present invention relates to a fabrication technique of a semiconductor device, particularly to a semiconductor wafer (hereinafter called "wafer") for use in a so-called pre-step among fabrication steps of the semiconductor device. More specifically, the present invention relates to a technique useful for the fabrication of a semiconductor integrated circuit device (hereinafter abbreviated as "IC").
In general, IC is obtained by forming an integrated circuit including a semiconductor device (said integrated circuit including a semiconductor device will hereinafter be called "integrated circuit") for each of a number of pellet divisions on the side of a primary surface of a wafer, separating the wafer into each pellet and then fabricating. In such a fabrication process of IC, it is necessary to finish the primary surface, on which an integrated circuit is to be made, as a mirror surface. In the case when only one of a pair of the primary surfaces is mirror-finished, it is easy to make discrimination between the obverse and reverse of the wafer. When the both sides of the wafer are mirror-finished, however, it becomes difficult to make discrimination between the observe and reverse of the wafer. Techniques have therefore been proposed in which an orientation flat (hereinafter abbreviated as "orifla") for indication of the direction of a crystal axis is formed asymmetrically in a circumferential direction or in which a second orifla is formed for the discrimination between the obverse and reverse of a wafer.
An example describing a wafer whose observe and reverse can be discriminated without changing its circular shape is disclosed in Japanese Patent Utility Model No. 106821/1990. Described specifically, disclosed in it is a technique in which the obverse and reverse of the wafer are discriminated by the difference between the sizes of two chamfered corners defined by the obverse and the side surface of the wafer and the reverse and the side surface of the wafer.
As a wafer which can suppress the lowering of the rotation symmetry and in addition, increase the number of the semiconductor pellets (hereinafter called "pellets"), a wafer having a notch formed at the circumferential portion thereof (said wafer will hereinafter be called "notched wafer") is known.
A notched wafer is disclosed, for example, in Japanese Utility Model Laid-Open No. 48020/1989. In it, a wafer in which the upper and lower edges of its ridgeline defining a notch have chamfered is disclosed. This notched wafer has a chamfered part formed at the notch so that the notch can be prevented from the damage upon application of a locating pin thereto in the IC fabrication step. As a result, the fabrication yield can be heightened.
In Japanese Patent Laid Open No. 240912/1990, disclosed is a notched wafer in which a notch formed at the circumferential portion thereof takes a form changing unsuccessively with the positional change toward the central direction and its plane shape is formed bilaterally asymmetrical in the circumferential direction. According to this notched wafer, the notch is formed bilaterally asymmetrical in the circumferential direction so that it is possible to discriminate the primary surface of the obverse from the primary surface of the reverse.